1. Field of the Invention
The present invention relates to a selective epitaxial growth method, and more particularly, it relates to a selective epitaxial growth method used in manufacturing of a semiconductor device.
2. Description of the Prior Art
In manufacturing of a semiconductor device such as an integrated circuit, there is often used a selective epitaxial growth method. The term "selective epitaxial growth" herein used means technique for epitaxially growing a semiconductor material on a semiconductor substrate exclusively in a desired region. Particularly important one of such technique is a method of epitaxially growing a semiconductor layer in an opening formed in an insulating film provided on a semiconductor substrate.
Such technique is disclosed in, for example, S. Hine, T. Hirao, S. Kayano and N. Tsubouchi, "A New Isolation Technology for Bipolar Devices by Low Pressure Selective Silicon Epitaxy", 1982 Symposium on VLSI Technology, Digest of Technical Papers, pp. 116-117 (1982). In this literature, there is described manufacturing of a bipolar device utilizing a selective epitaxial growth method under a low pressure and the result of measurement of the electric characteristic of the subject bipolar device. There are also disclosed manufacturing of a polysilicon gate MOS-FET utilizing a selective epitaxial growth method and the result of measurement of its electric characteristic in N. Endo et al., "Novel Device Isolation Technology with Selective Epitaxial Growth", IEDM '82, pp. 241-244 (1982). Further, in I. Jastrzebski et al., "CMOS Isolation using Selective Epitaxial Growth", 1983 Symposium on VLSI Technology, Digest of Technical Papers, pp. 50-51 (1983), there are disclosed application of a selective epitaxial growth method to isolation of a CMOS device and the result of measurement of the electric characteristic thereof.
FIGS. 1 to 4 of the drawings show a principal process of such prior art, which is now described with reference to the drawings. Epitaxial growth herein assumed is selective epitaxial growth on a silicon substrate. First, as shown in FIG. 1, a silicon substrate 1 of a first conductive type is prepared, and an insulating film 2 is formed on the major surface of the silicon substrate 1. The insulating film 2 may be silicon oxide (SiO.sub.2) or silicon nitride (Si.sub.3 N.sub.4). Then, utilizing a photographic process, a pattern of a resist film 3 is formed at a desired region on the insulating film 2 (FIG. 2). The exposed surface of the insulating film 2 and the resist film 3 are immersed in an etchant, whereby the former alone is selectively etched. In the etching process, the resist film 3 functions as a mask, such an etchant may be prepared by a solution containing hydrofluoric acid, when the isolation film 2 is formed by silicon oxide (SiO.sub.2). When, on the other hand, the insulating film 2 is formed by silicon nitride (Si.sub.3 N.sub.4), the etchant may contain PH.sub.2 O.sub.3. Such an etching method is called as wet etching. After completion of the etching, the resist film 2 is removed, whereby the insulating film 2 having a desired opening 4 is obtained (FIG. 3). It is to be noted that the opening 4 is tapered toward the silicon substrate 1 since undercut is caused during the etching process around the circumference of the resist film 3.
Then, the silicon wafer in the state as shown in FIG. 3 is brought in a chemical reactor, into which a source gas having a pressure of 100 Torr. is introduced with a carrier gas. Such a source gas may contain monosilane (SiH.sub.4), dichlorosilane (SiH.sub.2 Cl.sub.2) or silicon tetrachloride (SiCl.sub.4). By this process, as shown in FIG. 4, a silicon layer 5 of a first or second conductive type is epitaxially grown selectively on the exposed region of the silicon substrate 1, whereby the selective epitaxial growth process is completed.
By employing the aforementioned selective epitaxial growth method under a low pressure, there can be obtained a semiconductor device which is excellent in selectivity of growth and flatness of the grown silicon layer in comparison with a selective epitaxial growth method under the atmospheric pressure. However, the opening 4 of the insulating film 2 is tapered as shown in FIG. 3. Consequently, when the silicon layer 5 having thickness similar to that of the insulating film 2 is grown along the tapered surface of the opening 4, the silicon layer inevitably contains, at portions close to the tapered surface, a lattice defect 6 such as those shown by symbols x in FIG. 4. Such a lattice defect 6 is, e.g., a stacking fault, which generally arises over a length of 1 .mu.m. In a semiconductor device having such a silicon layer 5 containing the aforementioned lattice defect 6, the electric characteristic thereof is deteriorated, leading to inferior reliability of the semiconductor device. Further, the yield in manufacturing of the semiconductor device is decreased.